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Matthias Kaehlckesuperna9999
Matthias Kaehlcke
authored andcommittedOct 7, 2019
drm/bridge: dw-hdmi: Refuse DDC/CI transfers on the internal I2C controller
The DDC/CI protocol involves sending a multi-byte request to the display via I2C, which is typically followed by a multi-byte response. The internal I2C controller only allows single byte reads/writes or reads of 8 sequential bytes, hence DDC/CI is not supported when the internal I2C controller is used. The I2C transfers complete without errors, however the data in the response is garbage. Abort transfers to/from slave address 0x37 (DDC) with -EOPNOTSUPP, to make it evident that the communication is failing. Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Sean Paul <sean@poorly.run> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191002124354.v2.1.I709dfec496f5f0b44a7b61dcd4937924da8d8382@changeid
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‎drivers/gpu/drm/bridge/synopsys/dw-hdmi.c

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@@ -37,6 +37,7 @@
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#include "dw-hdmi-cec.h"
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#include "dw-hdmi.h"
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#define DDC_CI_ADDR 0x37
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#define DDC_SEGMENT_ADDR 0x30
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#define HDMI_EDID_LEN 512
@@ -399,6 +400,15 @@ static int dw_hdmi_i2c_xfer(struct i2c_adapter *adap,
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u8 addr = msgs[0].addr;
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int i, ret = 0;
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if (addr == DDC_CI_ADDR)
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/*
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* The internal I2C controller does not support the multi-byte
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* read and write operations needed for DDC/CI.
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* TOFIX: Blacklist the DDC/CI address until we filter out
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* unsupported I2C operations.
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*/
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return -EOPNOTSUPP;
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dev_dbg(hdmi->dev, "xfer: num: %d, addr: %#x\n", num, addr);
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for (i = 0; i < num; i++) {

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